US EditionA Lightweight Scan Instrumentation For Enhancing The Post-Silicon Test Efficiency in ICs (U. of Florida)
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A Lightweight Scan Instrumentation For Enhancing The Post-Silicon Test Efficiency in ICs (U. of Florida)
A technical paper titled “Enhancing Test Efficiency through Automated ATPG-Aware Lightweight Scan Instrumentation” was published by researchers at University of Florida. Abstract “Scan-based Design-for-Testability (DFT) measures are prevalent in modern digital integrated circuits to achieve high test quality at low hardware cost. With the advent of 3D heterogeneous integration and chiplet-based systems, the role of scan is becoming ever more imp…
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