3d stacked integration for DRAM and processors

Wafer Bonding Mechanisms Using SiCN Films For Hybrid Bonding Applications In 3D Integration

A new technical paper titled “Material-Mechanistic Interplay in SiCN Wafer Bonding for 3D Integration” was published by researchers at Yokohama National University, TEL, SK hynix, and University of Tsukuba. According to the paper: “Although much research has been conducted on wafer bonding methods compatible with the latest semiconductor manufacturing processes, discussions on the interface mechanisms during low temperature annealing have been i…

3d stacked integration for DRAM and processors

Institute of Science Tokyo revealed advances to its BBCube 3D integration process at ECTC, the IEEE Electronic Components and Technology Conference. “These new technologies can help in addressing the demands ... The post 3d stacked integration for DRAM and processors appeared first on Electronics Weekly.