US EditionTaiwan Semiconductor Powers Alphawave's 2nm Chip Breakthrough For Faster AI And HPC Connectivity - Taiwan Semiconductor (NYSE:TSM)
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8 Articles
Taiwan Semiconductor Powers Alphawave's 2nm Chip Breakthrough For Faster AI And HPC Connectivity - Taiwan Semiconductor (NYSE:TSM)
Alphawave Semi announces successful tape out of UCIe IP subsystem on TSMC's 2-nm process, supporting 36G die-to-die data rates. This milestone shows readiness for advanced chiplet architectures and future disaggregated SoCs.
Alphawave Semi Tapes Out Breakthrough 36G UCIe™ IP on TSMC 2nm, Unlocking Foundational AI Platform IP on Nanosheet Processes
LONDON, United Kingdom, and TORONTO, Canada – June 5th, 2025 – Alphawave Semi (LSE: AWE), a global leader in high-speed connectivity and compute silicon for the world’s technology infrastructure, announced the successful tape out of one of the industry’s first UCIe IP subsystem on TSMC’s N2 process, supporting 36G die-to-die data rates. The solution is fully integrated with TSMC’s Chip-on-Wafer-on-Substrate (CoWoS®) advanced packaging technology…
The processors and graphics cards have greatly improved over the years. Every two-three years we usually see an interesting performance jump and, in the past there were even more changes. It is noticeable that we are seeing fewer and fewer performance differences between generations, although this is largely due to the fact that the reduction of nanometers is becoming less and less frequent. This is necessary to create chips with higher transist…
Alphawave Semi Tapes Out New UCIe IP on TSMC 2nm Supporting 36G Die-to-Die Data Rates
Alphawave Semi, a global leader in high-speed connectivity and compute silicon for the world's technology infrastructure, announced the successful tape out of one of the industry's first UCIe IP subsystem on TSMC's N2 process, supporting 36G die-to-die data rates. The solution is fully integrated with TSMC's Chip-on-Wafer-on-Substrate (CoWoS ) advanced packaging technology, unlocking breakthrough bandwidth density and scalability for next-genera…
Alphawave Semi tapes out UCIe IP subsystem on TSMC’s N2 process
Alphawave Semi has taped out of one of the industry’s first UCIe IP subsystem on TSMC’s N2 process, supporting 36G die-to-die data rates. The design is integrated with TSMC’s Chip-on-Wafer-on-Substrate ... The post Alphawave Semi tapes out UCIe IP subsystem on TSMC’s N2 process appeared first on Electronics Weekly.
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