TSMC, ASE close ranks on PLP, 310x310mm emerges as the format to watch

TSMC, ASE close ranks on PLP, 310x310mm emerges as the format to watch

Taiwanese chipmakers TSMC and ASE Holdings are quietly positioning themselves at the forefront of panel-level packaging (PLP), an emerging advanced packaging format poised to succeed wafer-level CoWoS as AI chip demand scales. Unlike traditional wafer-level methods, PLP uses large square panels instead of circular wafers, allowing more chips to be packaged simultaneously, which boosts throughput and reduces costs. Long considered a niche technol…