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Samsung Reveals Next-Gen Memory with Stacked HBM and 400-Layer NAND

Samsung said zHBM could deliver about 8 times the performance of HBM5 while V10 BV-NAND boosts density by 58% over V9.

  • At the Future of Memory and Storage 2026 conference in Santa Clara, California, Samsung unveiled V10 BV-NAND, the industry's first Bonding V-NAND architecture featuring more than 400 layers achieved through wafer bonding.
  • Executive Vice President Jin-Yub Lee and Vice President Kyungryun Kim presented the keynote "Driving the Wave of AI Revolution: 3D Innovations in Memory & Storage Architecture," outlining strategies to maximize AI system performance and power efficiency.
  • Samsung said V10 BV-NAND boosts memory density by about 58% compared with V9, while the company believes zHBM achieves more than 10 times the memory density of HBM5 with tripled energy efficiency.
  • Distinct from traditional architectures, zHBM stacks directly on AI accelerators to minimize signal distance, improving bandwidth and efficiency, while zNAND-O targets edge AI applications requiring high space efficiency and low latency.
  • Expanding its portfolio, Samsung showcased the LPDDR5X-PIM memory chip, the industry's first LPDDR memory with built-in data processing that performs computations within the memory itself to enhance bandwidth and power efficiency.
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(Seoul = Yonhap News) Reporter Kang Tae-woo = Samsung Electronics [discussed] next-generation memory technology at the 'FMS Awards' held during the global memory technology conference 'FMS 2026'.

·Seoul, Korea (the Republic of)
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Business Wire broke the news in Crystal River, United States on Tuesday, August 4, 2026.
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