JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
8 Articles
8 Articles
HBM4 standard doubles channel count for AI boost
JEDEC Solid State Technology Association has published its standard for HMB4 high speed memory, doubling the channel count from 16 to 32 for higher performance. The JESD270-4 HBM4 brings higher bandwidth and larger stacks of higher capacity DRAM memory die to AI chips in particular. With transfer speeds up to 8 Gb/s across a 2048-bit […] The post HBM4 standard doubles channel count for AI boost appeared first on eeNews Europe.
JEDEC and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard
JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of its highly anticipated High Bandwidth Memory (HBM) DRAM standard: HBM4. Designed as an evolutionary step beyond the previous HBM3 standard, JESD270-4 HBM4 will further enhance data processing rates while maintaining essential features such as higher bandwidth, power efficiency, and incr…
Samsung's fortunes set to turn as HBM4 yields hit 40%
Samsung's chip division has lost billions of dollars as it fell behind SK Hynix in the high-bandwidth memory segment. SK Hynix has emerged as NVIDIA's largest supplier of HBM3 modules used in the latter's AI accelerators that are in high demand. Micron follows in second place while Samsung has still not clear NVIDIA's quality checks for its HBM3E chips. The company has pinned its hopes on the next-generation HBM4 modules as it seeks a reversal …
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